1. general description this specification describes the electrical, physical and dimensional properties of au-bumped sawn wafers on ffc with uv-tape of i-code sli label ics on an nxp c075ee process and is the base for delivery of tested i-code sli label ics. 2. ordering information 3. mechanical specification 3.1 wafer ? diameter: 8? ? thickness: 150 m 15 m 3.2 wafer backside ? material: si ? treatment: ground and stress release ? roughness: r a max. 0.5 m r t max. 5 m 3.3 chip dimensions ? chip size: 900 x 780 m 2 ? scribe lines: 80 / 80 m 3.4 passivation ? type: sandwich structure ? material: psg / nitride (on top) ? thickness: 500 nm / 600 nm sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape rev. 3.0 ? 5 february 2008 product data sheet addendum 150030 public table 1. ordering information type number package name description odering code sl2ics2001dw/v1d - bumped die on sawn wafer on uv-tape 9352 795 61005
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 2 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 3.5 au bump ? bump material: > 99.9 % pure au ? bump hardness: 35 ? 80 hv 0.005 ? bump shear strength: > 70 mpa ? bump height: 18 m ? bump height uniformity: ? within a die: 2 m ? within a wafer: 3 m ? wafer to wafer: 4 m ? bump flatness: 1.5 m ? bump size: ? la, lb 92 x 92 m 2 ? vss 1 , testio 1 62 x 62 m 2 ? pad size (unbumped): ? la, lb 78 x 78 m 2 ? vss 1 , testio 1 48 x 48 m 2 ? bump size variation: 5 m ? under bump metallization: sputtered tiw 3.6 fail die identification every die is electrically tested according to data sheet. identification of chips with electrical parameters not conform with the data sheet is done by inking and wafer mapping (all dies at wafer peri phery are identified as ?fail?). the ink information refe rs to unsawn wafers. at sawn wa fers (on ffc) additional ics are marked as ?fail? in the wa fer map if damaged during t he sawing process. these ics will not be inked. 3.6.1 wafer mapping wafer mapping for failed die information is available on floppy-disk. format: ibis format 1. pad vss and testio are disconnected when wafer is sawn
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 3 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 4. chip orientation and bondpad locations fig 1. chip orientation and bondpad locations pad(center) x [m] y [m] la 0.0 0.0 lb 665.0 -30.0 testio 687.0 -632.0 vss -93.0 -385.0 not to scale! (1) x-scribeline width: 80 m (7) lb bump edge to chip edge, y-length: 69[+7] m (2) y-scribeline width: 80 m (8) lb bump edge to chip edge, x-length: 39[+7] m (3) chip step, x-length: x-scribeline + 900 m (9) testio bump edge to chip edge, x-length: 32[+7] m (4) chip step, y-length: y-scribeline + 780 m (10) testio bump edge to chip edge, y-length: 32[+7] m (5) la bump edge to chip edge, y-length: 39[+7] m (11) vss bump edge to chip edge, y-length: 279[+7] m (6) la bump edge to chip edge, x-length: 104[+7] m (12) vss bump edge to chip edge, x-length: 26[+7] m [+7m] ? for pad edge to chip edge! (1) x y la testio vss lb (4) (3) (5) (6) (2) (9) widths and lengths are measured from metal to metal. (12) (11) (10) (8) (7)
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 4 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 5. limiting values [1] stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any conditions other than those described in the operating conditions and electrical characterist ics section of this specification is not implied. [2] this product includes circuitry spec ifically designed for the protection of its internal devices from the damaging effects of excessive static charge. nonetheless , it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima. [3] mil-std-883d, method 3015.7, human body model [4] the voltage between la and lb is limited by the on-ch ip voltage limitation ci rcuitry (corresponding to parameter i la-lb ) table 2. limiting values [1] [2] in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit t stg storage temperature range -55 +140 c tj junction temperature -55 +140 c v esd esd voltage immunity [3] - 2kv peak i max la-lb maximum input peak current - 60 ma peak t jop operating junction temperature -25 +85 c i la-lb input current [4] -30ma rms
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 5 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 6. characteristics 6.1 electrical characteristics [1] typical ratings are not guaranteed. these values listed are at room temperature. [2] bandwidth limitation ( 7 khz) according to ism band regulations. [3] measured with an hp4285a lcr meter at 13.56 mhz. [4] including losses in resonant capacitor and rectifier. [5] refer to iso/iec 15693-2 and 15693-3 including pul se shapes and tolerances; proper coil design assumed. 7. final wafertest specification ? mininum yield per wafer: 30 % of 35416 potential good dies. ? minimum yield per lot: 30 % table 3. characteristics [1] symbol parameter conditions min typ max unit t jop = -25 to 85 c v la-lb minimum supply voltage for read/write/eas 2.5 2.6 2.9 v rms f op operating frequency [2] 13.553 13.560 13.567 mhz c res input capacitance between la ? lb v la-lb = 2 v rms [3] 22.3 23.5 24.7 pf p min minimum operating supply power [4] -280- w m modulation of rf voltage for demodulator response [5] ---% t p sm modulation pulse length of rf voltage [5] --- s t d demodulator response time m 10 %, 100 % [5] --- s r mod load modulation [5] --- t ret eeprom data retention t amb 55 c10--years n write eeprom write endurance 100000 - - cycles m v max v min ? v max v min + ----------------------------- - =
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 6 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 8. hints for label ic encapsulation 8.1 protection against visible light as a result of the ultra low power design of the i-code sli label ic some analogue circuits on the chip are light sensitive. this means that common sun light can impact the operation of the label if the chip is no t protected against visible light radiation. measurements have shown that a radiation of e max =60w/m 2 (spectrum: 400 to 1000 nm) causes a reduced operati ng range of the plain chip. measurements of direct sunlight in summer deliver values up to 260 w/m 2 . to ensure proper operation an expected mini mum radiation reduction factor of approx. 9 (2 x 260/60 = 8.7) must be provided by the en capsulation. that means special care has to be taken to ensure a sufficient light protecti on of the i-code sli label ic (e.g. non translucent encapsulation or underfiller, ?) according to application requirements. 8.2 protection against uv light an eeprom memory, as it is also used in th e i-code sli label ic, has some principle sensitivity to uv light (applies to eeprom-tec hnology in general). thus strong uv exposure in the production of inlets/labels has to be avoided. uv protection has to be ensured using appropriate assembly methods. 8.3 resistance to x-rays x-ray exposure on comparable nxp ics (with even smaller feature si ze) caused neither a long term influence on the behaviour of the ics nor on the data retention of the eeproms. 9. references ? data sheet ?i-code sli label ic, functional specification? ? data sheet ?general specification for 8? wafer? ? data sheet ?general quality specification? ? application note ?i-code coil design guide? ? application note ?specificati on of the ibis wafermap? ? application note ?handling and processing of sawn wafers on uv dicing tape?
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 7 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 10. revision history table 4. revision history document id release date data sheet status change notice supersedes 150030 5 february 2008 product data sheet - - ? initial version
150030 ? nxp b.v. 2008. all rights reserved. product data sheet addendum rev. 3.0 ? 5 february 2008 8 of 9 nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape public 11. legal information 11.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 11.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 11.3 disclaimers general ? information in this document is believed to be accurate and reliable. however, nxp semiconductors d oes not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale ? nxp semiconductors products are sold subject to the general terms and condit ions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writ ing by nxp semiconductors. in case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. 11.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i-code ? is a trademark of nxp b.v. 12. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
nxp semiconductors sl2ics2001dw/v1d i-code sli label ic bumped wafer specification on uv-tape ? nxp b.v. 2008. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 5 february 2008 document identifier: 150030 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. public 13. tables table 1. ordering information . . . . . . . . . . . . . . . . . . . . .1 table 2. limiting values [1] [2] . . . . . . . . . . . . . . . . . . . . . . .4 table 3. characteristics [1] . . . . . . . . . . . . . . . . . . . . . . . . 5 table 4. revision history . . . . . . . . . . . . . . . . . . . . . . . . . 7 14. figures fig 1. chip orientation and bondpad locations. . . . . . . . .3 15. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 ordering information . . . . . . . . . . . . . . . . . . . . . 1 3 mechanical specification . . . . . . . . . . . . . . . . . 1 3.1 wafer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3.2 wafer backside . . . . . . . . . . . . . . . . . . . . . . . . . 1 3.3 chip dimensions . . . . . . . . . . . . . . . . . . . . . . . 1 3.4 passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3.5 au bump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3.6 fail die identification . . . . . . . . . . . . . . . . . . . . . 2 3.6.1 wafer mapping . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 chip orientation and bondpad locations . . . . . 3 5 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.1 electrical characteristics . . . . . . . . . . . . . . . . . . 5 7 final wafertest specification. . . . . . . . . . . . . . . 5 8 hints for label ic encapsulation . . . . . . . . . . . . 6 8.1 protection against visible light . . . . . . . . . . . . . 6 8.2 protection against uv light . . . . . . . . . . . . . . . . 6 8.3 resistance to x-rays . . . . . . . . . . . . . . . . . . . . . 6 8.3 resistance to x-rays . . . . . . . . . . . . . . . . . . . . . 6 9 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . 7 11 legal information. . . . . . . . . . . . . . . . . . . . . . . . 8 11.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8 11.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 11.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 11.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 contact information. . . . . . . . . . . . . . . . . . . . . . 8 13 tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 15 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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